wip: IPC and Runtime

Kernel/Include/Arch/CPU.h

@@ -2,6 +2,7 @@
 // Copyright (c) 2026 0xKSor
 
 #pragma once
+#include "Arch/Exceptions.h"
 #include <Types.h>
 
 static inline void CPUYield() {
@@ -63,7 +64,7 @@ static inline void CPUEnableMMU(Address l0PhysicalAddress) {
     // MAIR_EL1 (Memory Attribute Indirection Register)
     // kPTENormalMem is index 0 and kPTEDeviceMem is index 1
     // 0xFF = Normal, 0x00 = Device
-    UInt64 mair = (0xFFULL << 0) | (0x00ULL << 8); 
+    UInt64 mair = (0xFFULL << 0) | (0x00ULL << 8);
 
     // TCR_EL1 (Translation Control Register)
     // configures the mmu for 4kb pages and 48bit virtual addresses
@@ -82,11 +83,11 @@ static inline void CPUEnableMMU(Address l0PhysicalAddress) {
         "msr tcr_el1, %1\n"
         "msr ttbr0_el1, %2\n"  // set userspace root
         "msr ttbr1_el1, %2\n"  // set kernelspace root
-        "tlbi vmalle1is\n"  
+        "tlbi vmalle1is\n"
         "isb\n"                // Instruction Synchronization Barrier
         :: "r"(mair), "r"(tcr), "r"(l0PhysicalAddress) : "memory"
     );
-            
+
     // turn on the MMU in SCTLR_EL1 (System Control Register)
     // Bit 0 = M (MMU Enable), Bit 2 = C (Data Cache Enable), Bit 12 = I (Instruction Cache Enable)
     UInt64 sctlr;
@@ -111,4 +112,13 @@ static inline void CPUSwitchAddressSpace(Address l0Physical) {
     );
 }
 
-#define CPUException(number) __asm__ volatile ("svc %0" :: "i" (number) : "memory")
+static inline void CPUCopyIPCRegisters(ExceptionsContext* source, ExceptionsContext* destination) {
+    destination->x2 = source->x2;
+    destination->x3 = source->x3;
+    destination->x4 = source->x4;
+    destination->x5 = source->x5;
+    destination->x6 = source->x6;
+    destination->x7 = source->x7;
+}
+
+#define CPUException(number) __asm__ volatile ("svc %0" :: "i" (number) : "memory")

Kernel/Include/Arch/IO.h

@@ -14,4 +14,4 @@ static inline UInt32 IOAddressRead32(Address address) {
     UInt32 value = *(volatile UInt32*)address;
     __asm__ volatile ("dsb ld" ::: "memory"); // wait till my read is finished physically
     return value;
-}
+}