feat: GICv2 and timer

fix: TimerReset in GIC.c now uses kTimerFrequency

Kernel/Include/Arch/CPU.h

@@ -72,4 +72,4 @@ static inline void CPUEnableMMU(Address l0PhysicalAddress) {
         "isb\n"
         : "=r"(sctlr) : "r"(sctlr_flags) : "memory"
     );
-}
+}

Kernel/Include/Arch/GIC.h

@@ -0,0 +1,28 @@
+#pragma once
+#include <Types.h>
+#include <Arch/IO.h>
+#include <Arch/Exceptions.h>
+
+enum {
+    kGICDBaseAddress = 0x08000000,
+    kGICCBaseAddress = kGICDBaseAddress + 0x10000,
+
+    // GIC Distributor (GICD), offsets from GICD base
+    kGICDCTLR = 0x000,       // control
+    kGICDTYPER = 0x004,      // controller type
+    kGICDISENABLER = 0x100,  // interrupt set-enable
+    kGICDICENABLER = 0x180,  // interrupt clear-enable
+    kGICDICPENDR = 0x280,    // interrupt clear-pending
+    kGICDIPRIORITYR = 0x400, // interrupt priority
+    kGICDITARGETSR = 0x800,  // interrupt processor targets
+
+    // GIC CPU interface (GICC), offsets from CPU interface base
+    kGICCCTLR = 0x000,  // CPU interface control
+    kGICCPMR = 0x004,   // priority mask
+    kGICCIAR = 0x00C,   // interrupt acknowledge
+    kGICCEOIR = 0x010,  // end of interrupt
+};
+
+void GICInitialize(Pointer gicdVirtBase, Pointer giccVirtBase);
+void GICEnableInterrupt(UInt32 irqID);
+void GICDispatch(ExceptionsType type);

Kernel/Include/Arch/Timer.h

@@ -0,0 +1,8 @@
+#pragma once 
+#include <Types.h>
+
+static const UInt64 kTimerFrequency = 1000; // 1ms
+static const UInt8 kTimerIRQ = 30;
+
+void TimerInitialize();
+void TimerReset(UInt64 interval);

Kernel/Include/VM/PMM.h

@@ -13,12 +13,18 @@ typedef struct {
     Size size;
 } VMMemoryRegion;
 
+typedef struct {
+    VMMemoryRegion GICD;
+    VMMemoryRegion GICC;
+} GICRegion;
+
 
 typedef struct {
     VMMemoryRegion totalRAM;
     VMMemoryRegion reserved[kVMMaxReservedRegions];
     UInt32 reservedCount;
     VMMemoryRegion UART;
+    GICRegion GIC;
 } VMBootMemoryMap;
 
 void PMMInitialize(VMBootMemoryMap* bootMap);