feat(scheduler): working scheduler

Kernel/Source/Arch/Exceptions.c

@@ -4,8 +4,8 @@
 #include <IO/Serial.h>
 #include <OS/Panic.h>
 
-void ExceptionsHandler(ExceptionsContext* frame, ExceptionsType type) {
-    if (type == ExceptionsIRQEl1h || type == ExceptionsIRQEl064) return GICDispatch(type);
+Address ExceptionsHandler(ExceptionsContext* frame, ExceptionsType type) {
+    if (type == ExceptionsIRQEl1h || type == ExceptionsIRQEl064) return GICDispatch(frame, type);
     OSPanicException(frame);
 }
 

Kernel/Source/Arch/GIC.c

@@ -52,14 +52,18 @@ void GICCWriteEOIR(UInt32 irqID) {
     GICC[kGICCEOIR / 4] = irqID;
 }
 
-void GICDispatch(ExceptionsType type) {
-    if (type != ExceptionsIRQEl1h && type != ExceptionsIRQEl064) return;
+Address GICDispatch(ExceptionsContext* frame, ExceptionsType type) {
+    if (type != ExceptionsIRQEl1h && type != ExceptionsIRQEl064) return (Address)frame;
     UInt32 irqID = GICCReadIAR() & 0x3FF;
-    if (irqID == 1023) return; // spurious interrupt
+    if (irqID == 1023) return (Address)frame; // spurious interrupt
+
+
+    Address newStackPointer = (Address)frame;
 
     if (irqID == kTimerIRQ) {
-        TimerReset(kTimerFrequency);
+        newStackPointer = TimerHandler(frame);
     }
 
     GICCWriteEOIR(irqID);
+    return newStackPointer;
 }

Kernel/Source/Arch/Timer.c

@@ -1,5 +1,9 @@
 #include <Arch/Timer.h>
 #include <Arch/GIC.h>
+#include <OS/Scheduler.h>
+#include <Arch/Exceptions.h>
+
+static volatile UInt64 sTimerCounter = 0;
 
 void TimerInitialize() {
     GICEnableInterrupt(kTimerIRQ);
@@ -12,3 +16,13 @@ void TimerReset(UInt64 interval) {
     __asm__ volatile ("msr cntv_tval_el0, %0" :: "r"(frequency /interval));
     __asm__ volatile ("msr cntv_ctl_el0, %0" :: "r"((UInt64)1));
 }
+
+Address TimerHandler(ExceptionsContext* frame) {
+    sTimerCounter++;
+    TimerReset(kTimerFrequency);
+    return SchedulerNext((Address)frame);
+}
+
+UInt64 TimerGetCounter() {
+    return sTimerCounter;
+}

Kernel/Source/Arch/vectors.S

@@ -1,6 +1,6 @@
 .macro ventry type
     .align 7
-    sub sp, sp, #272 // save 272 bytes of stack
+    sub sp, sp, #288 // save 288 bytes of stack
     stp x0, x1, [sp, #0] // move stack 
     mov x1, #\type // move type to x1
     b ExceptionsTrapEntry
@@ -50,12 +50,17 @@ ExceptionsTrapEntry:
     mrs x21, elr_el1
     mrs x22, spsr_el1
     mrs x23, esr_el1
+    mrs x24, sp_el0
 
     stp x30, x21, [sp, #16 * 15]
     stp x22, x23, [sp, #16 * 16]
 
     mov x0, sp
     bl ExceptionsHandler
+    mov sp, x0
+
+    ldp x24, xzr, [sp, #16 * 17]
+    msr sp_el0, x24
 
     ldp x22, x23, [sp, #16 * 16]
     msr spsr_el1, x22
@@ -79,7 +84,7 @@ ExceptionsTrapEntry:
     ldp x2, x3, [sp, #16 * 1]
     ldp x0, x1, [sp, #0]
 
-    add sp, sp, #272
+    add sp, sp, #288
     eret
 
 .global ExceptionsVectorsInit