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Working kernel written on C and userspace-ready #1

Merged
sonya merged 61 commits from dev into main 2026-05-03 09:13:20 +00:00
Conversation 2 Commits 61 Files Changed 75
+6 -4
3 changed files with 6 additions and 4 deletions
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Showing only changes of commit 8d675abae9 - Show all commits
Kernel/Include/Arch/Timer.h
+1 -1
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@@ -2,7 +2,7 @@
#include <Types.h>
static const UInt64 kTimerFrequency = 1000; // 1ms
static const UInt8 kTimerIRQ = 30;
static const UInt8 kTimerIRQ = 27;
void TimerInitialize();
void TimerReset(UInt64 interval);
Kernel/Source/Arch/GIC.c
+3 -1
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@@ -53,11 +53,13 @@ void GICCWriteEOIR(UInt32 irqID) {
}
void GICDispatch(ExceptionsType type) {
OSLog("GICDispatch: %d\n", type);
if (type != ExceptionsIRQEl1h && type != ExceptionsIRQEl064) return;
UInt32 irqID = GICCReadIAR() & 0x3FF;
if (irqID == 1023) return; // spurious interrupt
if (irqID == 30) {
if (irqID == kTimerIRQ) {
OSLog("Timer IRQ\n");
TimerReset(kTimerFrequency);
}
Kernel/Source/Arch/Timer.c
+2 -2
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@@ -9,6 +9,6 @@ void TimerInitialize() {
void TimerReset(UInt64 interval) {
UInt64 frequency;
__asm__ volatile ("mrs %0, cntfrq_el0" : "=r"(frequency));
__asm__ volatile ("msr cntp_tval_el0, %0" :: "r"(frequency /interval));
__asm__ volatile ("msr cntp_ctl_el0, %0" :: "r" (1));
__asm__ volatile ("msr cntv_tval_el0, %0" :: "r"(frequency /interval));
__asm__ volatile ("msr cntv_ctl_el0, %0" :: "r" (1));
}